Logic Analyzer Trace Decoder (UART, SPI, I2C)
Convert raw digital sample CSV exports into readable protocol transactions. Decode UART serial characters, SPI master/slave packets, and I2C bus transactions offline.
DIGITAL SAMPLES (CSV)
0 lines
DECODED TRANSACTIONS
0 transactions
| Timestamp | Protocol | Hex Byte | ASCII / Representation | Details |
|---|---|---|---|---|
| Paste CSV samples or load sample trace. | ||||
Frequently Asked Questions
How are UART bits decoded from asynchronous transitions?
The decoder samples the signal line at half-bit intervals following each high-to-low start bit, reading 8 data bits (least significant bit first), and checking the high stop bit.
Does this tool handle parity bits?
Yes. The standard 8N1 configuration (8 data bits, no parity, 1 stop bit) is default, with support for even and odd parity checking.